Unachievable Region in Precision-Recall Space and Its Effect on Empirical Evaluation

Precision-recall (PR) curves and the areas under them are widely used to summarize machine learning results, especially for data sets exhibiting class skew. They are often used analogously to ROC curves and the area under ROC curves. It is known that PR curves vary as class skew changes. What was not recognized before this paper is that there is a region of PR space that is completely unachievable, and the size of this region depends only on the skew. This paper precisely characterizes the size of that region and discusses its implications for empirical evaluation methodology in machine learning.Comment: ICML2012, fixed citations to use correct tech report numbe

Lifted Variable Elimination for Probabilistic Logic Programming

Lifted inference has been proposed for various probabilistic logical frameworks in order to compute the probability of queries in a time that depends on the size of the domains of the random variables rather than the number of instances. Even if various authors have underlined its importance for probabilistic logic programming (PLP), lifted inference has been applied up to now only to relational languages outside of logic programming. In this paper we adapt Generalized Counting First Order Variable Elimination (GC-FOVE) to the problem of computing the probability of queries to probabilistic logic programs under the distribution semantics. In particular, we extend the Prolog Factor Language (PFL) to include two new types of factors that are needed for representing ProbLog programs. These factors take into account the existing causal independence relationships among random variables and are managed by the extension to variable elimination proposed by Zhang and Poole for dealing with convergent variables and heterogeneous factors. Two new operators are added to GC-FOVE for treating heterogeneous factors. The resulting algorithm, called LP$^2$ for Lifted Probabilistic Logic Programming, has been implemented by modifying the PFL implementation of GC-FOVE and tested on three benchmarks for lifted inference. A comparison with PITA and ProbLog2 shows the potential of the approach.Comment: To appear in Theory and Practice of Logic Programming (TPLP). arXiv admin note: text overlap with arXiv:1402.0565 by other author

Integração monolítica de conversores comutados CC-CC de comutação suave: soluções de projecto e simulações

A inclusão de circuitos de gestão de energia dentro dos SoC ainda se encontra em pleno desenvolvimento. Neste contexto é apresentado um primeiro estudo sobre topologias de conversores ressonantes tendo como objectivo a sua integração monolítica em tecnologia CMOS. Um novo método de projecto para conversores Quasi-Square-Wave de alta frequência para integração em tecnologia CMOS é apresentado. O Trabalho de simulação baseado em modelos da tecnologia CMOS 0,35μm revelou problemas distintos para esta topologia de comutação suave em relação à implementação discreta. Dois Conversores QSW de comutação no zero de tensão foram projectados e simulados, um para uma frequência de comutação na ordem da centena de MHz e outro na ordem das dezenas de MHz, utilizando o método apresentado. Os resultados de simulação são analisados, novas direcções para trabalho futuro e melhoramentos para o novo método de projecto são propostos, tendo em conta os problemas identificados.info:eu-repo/semantics/publishedVersio

Design Methologies for Integrated Inductor-Based Soft-Switching DC DC Converters

This paper presents a study on resonant converter topologies targeted for CMOS integration. Design methodologies to optimize efficiency for the integration of Quasi-Resonant and Quasi-Square-Wave converters are proposed. A power loss model is used to optimize the design parameters of the power stage, including the driver circuits, and also to conclude about CMOS technology limitations. Based on this discussion, and taking as reference a 0.35μm CMOS process, two converters are designed to validate the proposal: a Quasi Resonant boost converter operating at 100MHz and a Quasi-Square-Wave buck converter operating at 70MHz. Simulation results confirm the feasibility of these topologies for monolithic integration

A design methodology for integrated inductor-based DC-DC converters

A design methodology for monolithic integration of inductor based DC-DC converters is proposed in this paper. A power loss model of the power stage, including the drive circuits, is defined in order to optimize efficiency. Based on this model and taking as reference a 0.35 mu m CMOS process, a buck converter was designed and fabricated. For a given set of operating conditions the defined power loss model allows to optimize the design parameters for the power stage, including the gate-driver tapering factor and the width of the power MOSFETs. Experimental results obtained from a buck converter at 100 MHz switching frequency are presented to validate the proposed methodology

A lavagem do Bonfim: olhares e clicks cruzados entre as imagens de Weldon Americano e as fotografias da pesquisa Lazer e Corpo

Este artigo procura identificar as similaridades e as diferenças entre os conteúdos culturais e corporais subjacentes nas imagens fotográficas da Festa do Senhor do Bonfim retratadas por Weldon Americano da Costa em sua obra “Cidade do Salvador: Terra do meu coração” e as fotografias produzidas na Pesquisa Lazer e Corpo. Para tanto, adota a perspectiva da análise fotográfica (KOSSOY, 2001) como dispositivo de pesquisa. A associação e a correlação de fotografias de tempos históricos diferentes revela múltiplos significados emergentes nas festas populares baianas, suas facetas e ressignificações. Verifica-se: desde o cortejo das velhas e jovens baianas à presença das ‘baianas de eventos’, a arte de equilibrar entre fé e trabalho; as carroças, entre a tradição e a proibição; e a cultura material do vestir-se na roda de capoeirapesquisa financiada pela Rede CEDES/Ministério dos Esporte